Solid-state imaging devices for imaging a two-dimensional image are provided with a photodetecting section in which M×N pixels, each of which includes a photodiode, are two-dimensionally arranged in M rows and N columns. In each pixel of the photodetecting section, an amount of an electric charge of which corresponds to intensity of an incident light is generated in the photodiode, and accumulated therein. Data corresponding to an amount of accumulated electric charge is outputted. Subsequently, based on the data by each pixel, an image of light incident upon the photodetecting section is obtained. In a CMOS image sensor described in the below-described patent document 1, a substrate bias voltage is changed while the electric charge is being accumulated into the photodiode, and thereby, lowering of a read voltage and enlarging of a dynamic range are implemented.    Patent document 1: Japanese Published Unexamined Patent Application No. 2004-129015